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![Figure No. 4. MODIFIED BLOCK DIAGRAM 6. SOFTWARE REQUIREMENTS [1] VHDL](https://i2.wp.com/www.researchgate.net/profile/Shashank-Pujari-2/publication/221677080/figure/download/fig4/AS:669683757879305@1536676458414/Figure-No-4-MODIFIED-BLOCK-DIAGRAM-6-SOFTWARE-REQUIREMENTS-1-VHDL-or-Verilog.jpg)
